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Computer Architecture Essay

3309 words - 14 pages

Solution* for Chapter 1 Exercise*

Solutions for Chapter 1 Exercises
1.1 5, CPU
1.2 1, abstraction
1.3 3, bit
1.4 8, computer family
1.5 19, memory
1.6 10, datapath
1.7 9, control
1.8 11, desktop (personal computer)
1.9 15, embedded system
1.10 22, server
1.11 18, LAN
1.12 27, WAN
1.13 23, supercomputer
1.14 14, DRAM
1.15 13, defect
1.16 6, chip
1.17 24, transistor
1.18 12, DVD
1.19 28, yield
1.20 2, assembler
1.21 20, operating system
1.22 7, compiler
1.23 25, VLSI
1.24 16, instruction
1.25 4, cache •
1.26 17, instruction set architecture

Solutions for Chapter 1 Exercises

1.27 21, semiconductor
1.28 26, wafer
1.29 i
1.30 b
1.31 e
1.32 i
1.33 h
1.34 ...view middle of the document...

1.52 CISCtime = P x 8 r = 8 P r n s
RISC time = 2Px 2T= 4 PTns
RISC time = CISC time/2, so the RISC architecture has better performance.
1.53 Using a Hub:
Bandwidth that the other four computers consume = 2 Mbps x 4 = 8 Mbps
Bandwidth left for you = 10 - 8 = 2 Mbps
Time needed = (10 MB x 8 bits/byte) / 2 Mbps = 40 seconds
Using a Switch:
Bandwidth that the other four computers consume = 2 Mbps x 4 = 8 Mbps
Bandwidth left for you = 10 Mbps. The communication between the other
computers will not disturb you!
Time needed = (10 MB x 8 bits/byte)/10 Mbps = 8 seconds

Solutions for Chapter 1 EXWCIMS

1.54 To calculate d = a x f c - a x c , the CPU will perform 2 multiplications and 1
subtraction.
Time needed = 1 0 x 2 + 1 x 1 = 2 1 nanoseconds.
We can simply rewrite the equation &sd = axb-axc= ax (b-c). Then 1 multiplication and 1 subtraction will be performed.
Time needed = 1 0 x 1 + 1 x 1 = 11 nanoseconds.
1.55 No solution provided.
1.56 No solution provided.
1.57 No solution provided.
1.68 Performance characteristics:
Network address
Bandwidth (how fast can data be transferred?)
Latency (time between a request/response pair)
Max transmission unit (the maximum number of data that can be transmitted in one shot)
Functions the interface provides:
Send data
Receive data
Status report (whether the cable is connected, etc?)
1.69 We can write Dies per wafer = /((Die area)"1) and Yield = /((Die area)"2)
and thus Cost per die = /((Die area)3).
1.60 No solution provided.
1.61 From the caption in Figure 1.15, we have 165 dies at 100% yield. If the defect
density is 1 per square centimeter, then the yield is approximated by
1

= .198.

1 +

Thus, 165 x .198 = 32 dies with a cost of $1000/32 = $31.25 per die.

Solution* for Chapter 1 Exercises

1.62 Defects per area.
1

Yield =

1
(1 + Defects per area x Die a r e a / 2 ) 2

Defects per area = —:

1992

Die ares
Yield
Defect density
Die area

1992 + 19S0

Yield
Defect density
improvement

1980

j —L ••— - 1 |

0.16
0.48
5.54
0.97
0.48
0.91
6.09

Solutions for Chapter 2 ExardsM

Solutions for Chapter 2 Exercises
2.2 By lookup using the table in Figure 2.5 on page 62,
7ffififfohoi = 0111 1111 1111 1111 1111 1111 1
= 2,147,483,642^.
2.3 By lookup using the table in Figure 2.5 on page 62,
1100 1010 1111 1110 1111 1010 1100 111
V Time,
*->
'

y Time;
M,
LzJ

l JL,
- > Tirr
n-^

where AM is the arithmetic mean of the corresponding execution times.
4.32 No solution provided.
4.33 The time of execution is (Number of instructions) * (CPI) * (Clock period).
So the ratio of the times (the performance increase) is:
10.1 = (Number of instructions) * (CPI) * (Clock period)
(Number of instructions w/opt.) * (CPI w/opt.) * (Clock period)
= l/(Reduction in instruction count) * (2.5 improvement in CPI)
Reduction in instruction count = .2475.
Thus the instruction count must have been reduced to 24.75% of the original....

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