Silicon Realization Essay

5085 words - 21 pages

WHITE PAPER
CONTENTS
Introduction ....................... 1 A Crisis in Productivity, Predictability, and Profitability......................... 2 Disjointed Phases of Design ........................... 4 EDA360: A Holistic Solution ............................. 5 Intent, Abstraction, and Convergence ...................... 6 Mixed-Signal Silicon Realization ......................... 9 Other Silicon Realization Examples.......................... 11 Conclusion ....................... 11

SILIC O N R E A L I Z AT I O N — A N E W APPR O A C H T O FA S T E R , B E T T E R , AND M O R E P R O F I TA B L E S I L I C O N

AUTHORED BY DAVID DESHARNAIS, PRODUCT MANAGEMENT, SILICON REALIZATION

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These challenges cannot be solved by stitching together isolated point tools in an iterative, sequential design flow. They can only be solved with the deterministic, interoperable, end-to-end flow envisioned by Silicon Realization. This flow concurrently optimizes functionality, electrical specifications, and physical requirements throughout the design process. The success of this approach hinges on three critical requirements: • A consistent representation of design and verification intent • The appropriate use of accurate models and higher levels of abstraction • The convergence of late-stage design and manufacturing data into the early phases of the design process

In contrast to traditional EDA, Silicon Realization is not solely about solving a place-and-route problem, or building a more efficient op amp, or getting a tool to run 1.3x faster—it’s all of that and more. Silicon Realization is about solving the overall silicon design problem and bringing together everything that’s needed to produce complex silicon or IP. These days, Silicon Realization nearly always involves both analog and digital design, requiring a fully integrated mixed-signal design, verification, and implementation flow. Further, most silicon designs have aggressive power, performance, and form factor requirements in order to provide differentiated functionality for the end user. These demands often require advanced process nodes, where integrated circuits (ICs) sometimes exceed a billion transistors or more. With all of these demands, how can a design team expect to create a mixed-signal, low-power, giga-gate/GHz design on a predictable schedule and still attain profitability? That’s what Silicon Realization is all about. This whitepaper further discusses the motivations behind Silicon Realization, its ability to concurrently tackle functional, electrical, and physical requirements, and its use of intent, abstraction, and convergence. It illustrates how these concepts can be applied in an end-toend flow, using mixed-signal design and verification as an example.

A CRISIS IN PRODUCTIVITY, PREDICTABILITY, AND PROFITABILITY
Silicon designers today are under tremendous technology and business pressure. On the technology side, chip complexity is exploding and designers must meet multiple objectives including functionality, low power, high performance, and manufacturability. On the business side, design and manufacturing costs are skyrocketing, with SoC development costs approaching $100 million at the 32nm node. Time to market has continued to accelerate as product windows shrink, and even when the design makes it to tapeout, the key question becomes “will it yield?” There are many public case studies where silicon failure has cost companies hundreds of millions of dollars in direct losses. If one considers the indirect costs, class action suits, and implications to a company’s brand, the cost of failure is stratospheric. This is how people lose their jobs, and how...

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