American University of Sharjah – Computer Engineering College
Presented by: Larbi Yazid b00052497 under the supervision of Dr Tarik Ozkul
Academic year: 2013-2014
Technological review about MICROCONTROLLER CONFIGURED FOR EXTERNAL MEMORY DECRYPTION
This article will address the publication "MICROCONTROLLER CONFIGURED FOR EXTERNAL MEMORY DECRYPTION" in technological and systematic perspective. First, there will be a brief description of the structure and functioning of the microcontroller. Then, we'll try to answer some questions that can pass through the mind when reading the publication. At the end the Article could also offer suggestions or other perspectives for future ...view middle of the document...
We begin with the Program Counter which may receive a signal from the operating system or another device, the Program Counter will transmit a signal to the Address Alignment Module which is in charge of two functions: the first is to calculate the Offset Pointer that will point to the selected instruction in the cache containing the decrypted data, this instruction will be loaded into the instruction register; and the second is to forward the address of the block to fetch to the Address Generator.
On its side, Address Generator may put the address in the address bus regardless of its size, and then communicates the reading time to the first cache that will receive the encrypted data.
Once the data is in the cache, they pass throw the Decryption Engine synchronized with a clock faster than the clock that synchronizes the instruction register and the Program Counter.
In the end, the decrypted data is loaded into the second cache, and the instruction pointed by the Pointer Offset is loaded into the instruction register, and the cycle can be restarted.
Detailed study of the system.
During our reading of the article "Microcontroller configured for external memory decryption", some questions had risen to the surface, and we have tried to clarify some points, and to provide further details referring to other papers that have treated the same subject or a topic of the same area of research.
1. How do the nodes communicate between themselves?
Regarding the paper “Peer-to-peer communications in ami with source-tree routing”
(CA 2755331 C), there are two classes of nodes according to the processing and the memory’s size: full functionality nodes and Reduced functionality nodes, as the structure is built in form of tree, rout nodes store only the coordinates of neighboring nodes, and therefore the routing is a peer-to-peer communication.
2. How does the decryption engine function?
We will provide details about the functioning of the decryption engine according to the publication entitled "Encryption and decryption device” U.S. 20120069997 A1.
Decryption uses a secret key, and calculated from data in clear, with the help of the following elements: Memory for saving temporary data and interface that retrieves the encrypted data.
Decryption goes through four levels or layers:
* First, calculating the intermediate data using a secret key after a round key and stored in memory.
* In the second plane, an encryption of the data i (1 <i <N) is performed, where N is the total number of data.
* The third level comprises applying a conversion arithmetic operation to mix the second last intermediate data (Nth) with the following one (N+1th) and stores the result.
* The fourth level is the partial encryption of data to have a data in clear, by performing an inverse conversion of the (N +1th) intermediate data operation.
3. How does the system detect errors, control the transmission and ensure the data coherence?